The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2019
Filed:
Jun. 30, 2017
Intel Corporation, Santa Clara, CA (US);
Hussein Alameer, Portland, OR (US);
Uksong Kang, Hillsboro, OR (US);
Kjersten E. Criss, Beaverton, OR (US);
Rajat Agarwal, Beaverton, OR (US);
Wei Wu, Portland, OR (US);
John B. Halbert, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A stacked memory chip device is described. The stacked memory chip device includes a plurality of stacked memory chips. The stacked memory chip device includes read/write logic circuitry to service read/write requests for cache lines kept within the plurality of stacked memory chips. The stacked memory chip device includes data protection circuitry to store information to protect substantive data of cache lines in the plurality of stacked memory chips, where, the information is kept in more than one of the plurality of stacked memory chips, and where, any subset of the information that protects respective substantive information of a particular one of the cache lines is not stored in a same memory chip with the respective substantive information.