The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Dec. 09, 2016
Applicant:

Stc.unm, Albuquerque, NM (US);

Inventors:

Steven R. J. Brueck, Albuquerque, NM (US);

Seung-Chang Lee, Albuquerque, NM (US);

Christian Wetzel, Troy, NY (US);

Mark Durniak, Troy, NY (US);

Assignee:

STC.UNM, Albuquerque, NM (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 33/32 (2010.01); H01L 21/02 (2006.01); H01L 21/78 (2006.01); H01L 33/00 (2010.01); H01L 33/04 (2010.01); H01L 33/18 (2010.01); H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
H01L 33/32 (2013.01); H01L 21/0243 (2013.01); H01L 21/0251 (2013.01); H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 21/02395 (2013.01); H01L 21/02433 (2013.01); H01L 21/02458 (2013.01); H01L 21/02494 (2013.01); H01L 21/02502 (2013.01); H01L 21/02587 (2013.01); H01L 21/02609 (2013.01); H01L 21/7806 (2013.01); H01L 29/04 (2013.01); H01L 33/0075 (2013.01); H01L 33/0079 (2013.01); H01L 33/04 (2013.01); H01L 33/18 (2013.01);
Abstract

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.


Find Patent Forward Citations

Brueck, Steven R. J.. (2019). Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure (U.S. Patent No. 10453996). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10453996

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…