The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Jan. 07, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jun Cai, Allen, TX (US);

Binghua Hu, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/866 (2006.01); H01L 29/66 (2006.01); H01L 29/868 (2006.01); H01L 21/761 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0615 (2013.01); H01L 21/761 (2013.01); H01L 29/0626 (2013.01); H01L 29/66106 (2013.01); H01L 29/866 (2013.01); H01L 29/868 (2013.01);
Abstract

In some embodiments, an apparatus comprises a semiconductor layer doped with a first-type dopant, a first region doped with the first-type dopant, a second region doped with the first-type dopant, and a third region doped with a second-type dopant, where the second-type dopant is opposite the first-type dopant. The first, second, and third regions are non-overlapping and are formed in the semiconductor layer. The third region is positioned between the first region and the second region. The apparatus also comprises a plurality of Zener implant regions buried in the semiconductor layer and the third region, where each of the plurality of Zener implant regions is configured to generate a different pinch-off region.


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