The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Dec. 15, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Sung Dae Suk, Seoul, KR;

Geum Jong Bae, Suwon-si, KR;

Joo Hee Jeong, Seoul, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 23/52 (2006.01); H01L 23/528 (2006.01); H01L 29/10 (2006.01); H01L 27/02 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 21/306 (2006.01); H01L 21/311 (2006.01); H01L 21/18 (2006.01); H01L 23/522 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1211 (2013.01); H01L 21/185 (2013.01); H01L 21/30604 (2013.01); H01L 21/31111 (2013.01); H01L 21/76251 (2013.01); H01L 21/76283 (2013.01); H01L 21/845 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/0207 (2013.01); H01L 29/0649 (2013.01); H01L 29/1033 (2013.01); H01L 29/7391 (2013.01);
Abstract

A semiconductor device includes a base substrate, a buried insulating film on the base substrate, a first semiconductor substrate pattern on the buried insulating film, a second semiconductor substrate pattern on the buried insulating film, the second semiconductor substrate pattern being spaced apart from the first semiconductor substrate pattern, a first device pattern on the first semiconductor substrate pattern, a second device pattern on the second semiconductor substrate pattern, the first and second device patterns having different characteristics from each other, an isolating trench between the first semiconductor substrate pattern and the second semiconductor substrate pattern, the isolating trench extending only partially into the buried insulating film, and a lower interlayer insulating film overlying the first device pattern and the second device pattern and filling the isolating trench.


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