The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Oct. 29, 2017
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Shinichi Uchida, Tokyo, JP;

Takafumi Kuramoto, Tokyo, JP;

Yasutaka Nakashiba, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 27/06 (2006.01); H01L 29/94 (2006.01); H01L 21/84 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01); H01L 29/93 (2006.01); H01L 23/485 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 21/84 (2013.01); H01L 23/485 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1207 (2013.01); H01L 29/0649 (2013.01); H01L 29/66174 (2013.01); H01L 29/93 (2013.01); H01L 29/94 (2013.01);
Abstract

A semiconductor device of the present invention includes, in a regionC, a top electrode made by a semiconductor layer of an SOI substrate, a capacitive insulating film made by an insulating layer, a bottom electrode made by a supporting board, and a lead part (a high-concentration impurity region of an n type) of the bottom electrode coupled to the supporting board. An SOI transistor in a regionB is formed over a main surface of the semiconductor layer over the insulating layer as a thin film, and threshold voltage can be adjusted by applying a voltage to a well arranged on the rear face side of the insulating layer.


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