The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Aug. 14, 2017
Applicant:

Fairchild Semiconductor Corporation, Sunnyvale, CA (US);

Inventors:

John Constantino, Morgan Hill, CA (US);

Timwah Luk, Falmouth, ME (US);

Ahmad Ashrafzadeh, Morgan Hill, CA (US);

Robert L. Krause, San Jose, CA (US);

Etan Shacham, Cupertino, CA (US);

Maria Clemens Ypil Quinones, Cebu, PH;

Janusz Bryzek, Oakland, CA (US);

Chung-Lin Wu, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 27/06 (2006.01); H01L 49/02 (2006.01); H01L 23/495 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/538 (2013.01); H01L 23/49531 (2013.01); H01L 23/49537 (2013.01); H01L 23/49541 (2013.01); H01L 23/49575 (2013.01); H01L 23/49589 (2013.01); H01L 23/66 (2013.01); H01L 27/06 (2013.01); H01L 28/40 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73257 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01);
Abstract

In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.


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