The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Jan. 23, 2018
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Himani Suhag Kamineni, Mechanicville, NY (US);

Vimal Kumar Kamineni, Mechanicville, NY (US);

Daniel Smith, Ballston Spa, NY (US);

Maxwell Lippitt, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/768 (2006.01); H01L 21/306 (2006.01); H01L 23/532 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 23/485 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 21/30625 (2013.01); H01L 21/76816 (2013.01); H01L 23/485 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53257 (2013.01); H01L 29/41741 (2013.01); H01L 29/4232 (2013.01); H01L 29/66666 (2013.01); H01L 23/5226 (2013.01); H01L 23/53209 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53252 (2013.01); H01L 23/53266 (2013.01); H01L 23/53295 (2013.01);
Abstract

An integrated circuit product includes a substrate, an interlayer dielectric (ILD) material positioned above the substrate and a through-substrate-via (TSV) extending continuously through the substrate and the ILD material. The TSV includes a substrate portion of the TSV that is positioned in and extends continuously through the substrate and an ILD portion of the TSV that is positioned in and extends continuously through the ILD. An insulating liner layer is selectively positioned between and separates the substrate portion of the TSV and the substrate, wherein the selectively positioned insulating liner layer does not extend from the substrate to the ILD material.


Find Patent Forward Citations

Kamineni, Himani. (2019). Integrated circuit product having a through-substrate-via (tsv) and a metallization layer that are formed after formation of a semiconductor device (U.S. Patent No. 10446443). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10446443

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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