The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2019
Filed:
Apr. 12, 2017
Intel Corporation, Santa Clara, CA (US);
Kalyana Ravindra Kantipudi, Sunnyvale, CA (US);
Intel Corporation, San Jose, CA (US);
Abstract
A method of screening for configuration-related defects in integrated circuits is provided. To detect configuration defects, test pattern configuration data and error correction data for that test pattern are loaded into configuration memory. Existing cyclic redundancy check circuitry on the integrated circuit is recruited to compute check-sum signatures based on the data stored in each frame of the memory array. Defects in configuration memory cells and configuration-related circuitry are identified by comparing the error correction data of frame to the computed check-sum signature of a frame. Localized freezing of programmable logic associated with configuration memory is optionally applied to eliminate data contention and ensure maximum coverage of the memory array during screening. Several test patterns of configuration data are also provided.