The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Jun. 29, 2016
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Tommi Jorma Mikael Jokinen, Austin, TX (US);

Gus Ikonomopoulos, Austin, TX (US);

Jatin Vinay Pai, Austin, TX (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/28 (2013.01); G06F 13/1673 (2013.01); G06F 13/4022 (2013.01);
Abstract

Systems and methods for operating a DMA unit with address alignment are disclosed. These may include configuring a bandwidth control setting for a read job that includes a data transfer size corresponding to a first number of bytes. A second number of bytes to reach a read address alignment is determined. In a first data transfer, a third number of bytes substantially equal to the first number of bytes plus the second number of bytes are transferred. In subsequent data transfers of the read job, the first number of bytes are transferred to the data buffer. After the third number of bytes are transferred to the data buffer, a fourth number of bytes from the data buffer are transferred to a destination.


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