The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2019
Filed:
Dec. 08, 2017
Applicant:
Macronix International Co., Ltd., Hsinchu, TW;
Inventor:
Ting-Yu Liu, Hsinchu, TW;
Assignee:
Macronix International Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01); G11C 29/00 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G11C 16/00 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 3/0688 (2013.01); G06F 11/1048 (2013.01); G06F 12/0646 (2013.01); G11C 16/00 (2013.01); G11C 29/76 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7202 (2013.01); G06F 2212/7209 (2013.01); G11C 29/52 (2013.01);
Abstract
Systems, methods, and apparatus including computer-readable mediums for managing block arrangement of super blocks in a memory such as NAND flash memory are provided. In one aspect, a memory controller for managing block arrangement of super blocks in a memory includes control circuitry coupled to the memory having at least two planes of physical blocks and configured to maintain block information of each individual physical block in the planes and combine one or more physical blocks from the planes to a super block based on the block information of the physical blocks in the planes.