The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2019

Filed:

Feb. 14, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Yi Peng, Newark, CA (US);

Andrew Martyn Draper, Chesham, GB;

Nathan Edward Krueger, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3185 (2006.01); G01R 31/28 (2006.01); G01R 31/317 (2006.01); G06F 11/273 (2006.01); G06F 11/267 (2006.01); G01R 31/327 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318597 (2013.01); G01R 31/2884 (2013.01); G01R 31/31705 (2013.01); G06F 11/267 (2013.01); G06F 11/2733 (2013.01);
Abstract

An integrated circuit device includes a first partition and a second partition. The integrated circuit device also includes a Joint Test Action Group (JTAG) system that controls at least a portion of the integrated circuit device via logic signals. The JTAG system includes a JTAG interface that receives logic signals and a first JTAG hub instantiated in the first partition communicatively coupled to the JTAG interface. The integrated circuit device further includes a second JTAG hub instantiated in the second partition communicatively coupled to the first JTAG hub via a bridge.


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