The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2019
Filed:
Dec. 28, 2017
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventor:
Yantao Ma, Boise, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/15 (2006.01); G11C 7/22 (2006.01); G11C 8/10 (2006.01); H03D 7/16 (2006.01); G11C 11/4076 (2006.01); H03B 27/00 (2006.01); G11C 7/20 (2006.01); G11C 11/4072 (2006.01);
U.S. Cl.
CPC ...
H03K 5/15013 (2013.01); G11C 7/222 (2013.01); G11C 8/10 (2013.01); G11C 11/4076 (2013.01); H03B 27/00 (2013.01); H03D 7/165 (2013.01); G11C 7/20 (2013.01); G11C 11/4072 (2013.01);
Abstract
Apparatuses are provided for a quadra-phase clock signal generator. An example apparatus includes a first delay circuit configured to receive a first input clock signal generating a first delayed clock signal. A first phase mixer is provided communicatively coupled to the first delay circuit and configured to receive the first delayed clock signal at a first input and a second input clock signal at a second input. The first phase mixer may then generate a first output clock signal at a first output node responsive, at least in part, to mixing of the first delayed clock signal and the second input clock signal.