The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2019
Filed:
May. 07, 2018
Applicant:
Lyontek Inc., Hsinchu, TW;
Inventor:
Chi-Cheng Hung, Hsinchu, TW;
Assignee:
LYONTEK INC., Hsinchu, TW;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49568 (2013.01); H01L 23/3114 (2013.01); H01L 23/4952 (2013.01); H01L 23/49503 (2013.01); H01L 23/49575 (2013.01); H01L 2224/48091 (2013.01); H01L 2924/181 (2013.01);
Abstract
A dual-chip package structure is configured to electrically connect a first CS bonding pad of a non-volatile memory chip to a CS pin of a lead frame and electrically connect a second CS bonding pad of a volatile memory chip to a heat-dissipating exposed pad, so as to provide a non-volatile memory chip select signal for the non-volatile memory chip through the CS pin, and provide a volatile memory chip select signal for the volatile memory chip through the heat-dissipating exposed pad. This achieves a low pin count dual-chip package structure, which can effectively reduce the cost and avoid conflict between the two chips.