The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2019
Filed:
Dec. 29, 2017
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Antonino Rigano, Pioltello, IT;
Fabio Pellizzer, Boise, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); G11C 13/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1691 (2013.01); G11C 13/0004 (2013.01); G11C 13/0023 (2013.01); G11C 13/0038 (2013.01); H01L 27/2445 (2013.01); H01L 27/2463 (2013.01); H01L 45/06 (2013.01); H01L 45/065 (2013.01); H01L 45/12 (2013.01); H01L 45/124 (2013.01); H01L 45/128 (2013.01); H01L 45/143 (2013.01); H01L 45/144 (2013.01); H01L 45/16 (2013.01);
Abstract
Clamp elements, memories, apparatuses, and methods for forming the same are disclosed herein. An example memory may include an array of memory cells and a plurality of clamp elements. A clamp element of the plurality of clamp elements may include a cell structure formed non-orthogonally relative to at least one of a bit line or a word line of the array of memory cells and may be configured to control a voltage of a respective bit line.