The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

Sep. 13, 2016
Applicant:

Shindengen Electric Manufacturing Co., Ltd., Tokyo, JP;

Inventors:

Ryohei Kotani, Hanno, JP;

Toshiki Matsubara, Hanno, JP;

Nobutaka Ishizuka, Hanno, JP;

Masato Mikawa, Hanno, JP;

Hiroshi Oshino, Hanno, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 21/8249 (2006.01); H01L 27/06 (2006.01); H01L 29/866 (2006.01); H01L 29/16 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0255 (2013.01); H01L 21/8249 (2013.01); H01L 21/823487 (2013.01); H01L 27/0629 (2013.01); H01L 27/0635 (2013.01); H01L 29/0638 (2013.01); H01L 29/404 (2013.01); H01L 29/66333 (2013.01); H01L 29/7395 (2013.01); H01L 29/7808 (2013.01); H01L 29/0619 (2013.01); H01L 29/1095 (2013.01); H01L 29/16 (2013.01); H01L 29/66348 (2013.01); H01L 29/7397 (2013.01); H01L 29/866 (2013.01);
Abstract

A semiconductor device of an embodiment includes a conductive semiconductor substrate, an insulating film formed on the semiconductor substrate, an overvoltage protection diode configured to be formed on the insulating film and to include an n-type semiconductor layer and a p-type semiconductor layer alternately arranged adjacent to each other, and an insulating film that covers the overvoltage protection diode. The concentration of the p-type impurities in the p-type semiconductor layer is lower than the concentration of the n-type impurities in the n-type semiconductor layer. The concentration peak of the p-type impurities is disposed in a non-boundary region between a boundary region and a boundary region.


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