The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2019
Filed:
Dec. 07, 2017
Tel Fsi, Inc., Chaska, MN (US);
Edward D. Hanzlik, Shorewood, MN (US);
Sean Moore, Maple Grove, MN (US);
Brian D. Hansen, Carver, MN (US);
TEL FSI, INC., Chaska, MN (US);
Abstract
A wafer edge lift pin of an apparatus for manufacturing a semiconductor device is described. The wafer edge lift pin includes an offset top section containing a notch portion to support and laterally confine the wafer. The notch portion horizontally sweeps away from the wafer along a radius so that rotation adjusts lateral confinement of the wafer. A base section below the top section has a diameter greater than a diameter of the top section across the notch portion to help strengthen the pin and to allow perpendicular mounting. A bottom section has a diameter that is smaller than the diameter of the base section and provides a boss feature to mount the lift pin. The apparatus includes a process chamber where the wafer is processed, a chuck assembly on which the wafer is loaded. At least three wafer edge lift pins move the wafer up and down.