The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2019

Filed:

Mar. 31, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Lakshminarayana Pappu, Folsom, CA (US);

Suketu Bhatt, Folsom, CA (US);

Satheesh Chellappan, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 11/22 (2006.01); G06F 3/06 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4291 (2013.01); G06F 11/2215 (2013.01);
Abstract

Techniques and mechanisms to modify packet information in support of on-chip test functionality. In an embodiment, an integrated circuit (IC) chip includes a protocol stack to receive and process packetized information—e.g., where the processing of at least one isochronous timestamp packet (ITP) includes circuitry of the protocol stack replacing non-deterministic data of the ITP with substitute information. A deterministic nature of the substitute information enables the subsequent generation of corresponding signature information which can be used in an evaluation of circuit performance. In another embodiment, the ITP packet is modified at a transaction layer of the protocol stack, and the signature information is determined with an accumulator circuit which is part of another layer of the protocol stack.


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