The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2019

Filed:

Jun. 06, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ruchika Singh, Portland, OR (US);

Paul S. Diefenbaugh, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 13/24 (2006.01); G06F 1/3203 (2019.01);
U.S. Cl.
CPC ...
G06F 13/24 (2013.01); G06F 1/3203 (2013.01);
Abstract

In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute graphics instructions, and a power controller including a duty cycle logic to set a duty cycle having a cycle time formed of an active time window in which at least some of the plurality of cores are to be active and an idle time window in which the plurality of cores are to be in a low power state. The duty cycle logic may adjust a duration of at least one of an active time window and an inactive time window based on interrupt information to accommodate an impending interrupt within the active time window. Other embodiments are described and claimed.


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