The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2019

Filed:

Dec. 26, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Martin G. Dixon, Portland, OH (US);

Ravi Rajwar, Portland, OR (US);

Konrad K. Lai, Vancouver, WA (US);

Robert S. Chappell, Portland, OR (US);

Rajesh S. Parthasarathy, Hillsboro, OR (US);

Alexandre J. Farcy, Hillsboro, OR (US);

Ilhyun Kim, Beaverton, OR (US);

Prakash Math, Portland, OR (US);

Matthew Merten, Hillsboro, OR (US);

Vijaykumar Kadgi, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 12/0875 (2016.01); G06F 12/0897 (2016.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 12/084 (2016.01); G06F 12/0895 (2016.01); G06F 13/42 (2006.01); G06F 12/0831 (2016.01); G06F 9/52 (2006.01); G06F 12/0811 (2016.01); G06F 12/0862 (2016.01); G06F 12/1027 (2016.01); G06F 9/46 (2006.01); G06F 12/0815 (2016.01); G06F 12/1045 (2016.01); G06F 12/0806 (2016.01);
U.S. Cl.
CPC ...
G06F 9/3855 (2013.01); G06F 9/3004 (2013.01); G06F 9/3016 (2013.01); G06F 9/30047 (2013.01); G06F 9/30087 (2013.01); G06F 9/30098 (2013.01); G06F 9/30145 (2013.01); G06F 9/3802 (2013.01); G06F 9/384 (2013.01); G06F 9/3842 (2013.01); G06F 9/467 (2013.01); G06F 9/528 (2013.01); G06F 12/084 (2013.01); G06F 12/0806 (2013.01); G06F 12/0811 (2013.01); G06F 12/0815 (2013.01); G06F 12/0831 (2013.01); G06F 12/0862 (2013.01); G06F 12/0875 (2013.01); G06F 12/0895 (2013.01); G06F 12/0897 (2013.01); G06F 12/1027 (2013.01); G06F 12/1045 (2013.01); G06F 13/1673 (2013.01); G06F 13/4068 (2013.01); G06F 13/4282 (2013.01); G06F 2212/452 (2013.01); G06F 2212/50 (2013.01); G06F 2212/60 (2013.01); G06F 2212/602 (2013.01); G06F 2212/621 (2013.01); G06F 2212/68 (2013.01); G06F 2212/682 (2013.01);
Abstract

An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.


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