The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2019

Filed:

Oct. 19, 2016
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Michal Silbermintz, Tel Mond, IL;

John Russo, Austin, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01);
U.S. Cl.
CPC ...
G06F 8/4434 (2013.01); G06F 8/443 (2013.01); G06F 8/447 (2013.01);
Abstract

A processing device includes an instruction memory to store executable applications that are executable by a target processor, and a compiler. The compiler includes a builder module and a call graph generator. The builder module to build executable applications for the target processor based on a set of instructions. The call graph generator to create a first call graph that indicates a stack usage for each call path of the executable applications. If a first executable application built by the builder module includes a call path that exceeds a stack size constraint of the target processor, the builder module to optimize only functions within the call path that exceeds the stack size constraint in response to the request from the evaluation monitor, and to build a second executable application based on the set of instructions. The second executable application is optimized for stack memory usage of the target processor.


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