The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Nov. 06, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Randy W. Mann, Milton, NY (US);

Bipul C. Paul, Mechanicville, NY (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 27/092 (2006.01); G11C 11/412 (2006.01); H01L 27/118 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); G11C 11/412 (2013.01); H01L 27/092 (2013.01); H01L 2027/11816 (2013.01);
Abstract

One illustrative 6T SRAM cell structure disclosed herein includes a first active region with a first N-type pass gate transistor, a first N-type pull-down transistor and a first P-type pull-up transistor, each of which are formed in and above the first active region, wherein the first N-type pull-down transistor is positioned laterally between the first N-type pass gate transistor and the first P-type pull-up transistor, and a second active region with a second N-type pass gate transistor, a second N-type pull-down transistor and a second P-type pull-up transistor, each of which are formed in and above the second active region, wherein the second N-type pull-down transistor is positioned laterally between the second N-type pass gate transistor and the second P-type pull-up transistor.


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