The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

May. 10, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Michael V. Ho, Allen, TX (US);

Ravi Kiran Kandikonda, Frisco, TX (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 11/4096 (2006.01); G11C 11/408 (2006.01); G11C 11/4076 (2006.01); G11C 11/4093 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G11C 11/4076 (2013.01); G11C 11/4087 (2013.01); G11C 11/4093 (2013.01);
Abstract

Devices, systems, and methods for reducing noise couplings between propagation lines for size efficiency. In one embodiment, a memory device is provided, comprising a memory array and an input/output (I/O) circuit. The I/O circuit can include a first plurality of global data lines and a second plurality of global data lines. The second plurality of global data lines are directly interleaved between the first plurality of global date lines and are configured to shield the first plurality of global data lines. In some embodiments, the first plurality of global data lines are shorter in length than the second plurality of global data lines and are switched before the second plurality of global data lines are switched.


Find Patent Forward Citations

Loading…