The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Dec. 27, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Hyun-mog Park, Seoul, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11575 (2017.01); H01L 23/535 (2006.01); H01L 29/06 (2006.01); H01L 27/11582 (2017.01); H01L 27/11556 (2017.01); H01L 27/11573 (2017.01);
U.S. Cl.
CPC ...
H01L 23/535 (2013.01); H01L 27/11556 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01); H01L 29/0649 (2013.01); H01L 27/11573 (2013.01);
Abstract

A three-dimensional semiconductor device includes: a substrate having a cell array region and a contact region; a stacked structure including a plurality of electrodes and a plurality of electrode isolation insulating layers, which are alternately stacked on the substrate in a vertical direction, and having a stepwise structure on the contact region; vertical structures penetrating the stacked structure in the cell array region, each of the vertical structures constituting a cell string; and word line contact plugs, each penetrating an uppermost electrode among the plurality of electrodes in a region of each of tread portions of the stacked structure having the stepwise structure, being connected to another electrode under the penetrated uppermost electrode, and being electrically insulated from the penetrated uppermost electrode.


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