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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10381380 B1

PDFFull Text
Date of Patent:
Aug. 13, 2019

Filed:

Apr. 08, 2018

Method for forming semiconductor device

Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chia-Fu Hsu, Tainan, TW;

Chun-Yuan Wu, Yun-Lin County, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;

Attorney:

Winston Hsu

Primary Examiner:

Bradley Smith

Assistant Examiner:

David J Goodwin

Int. Cl.
CPC ...
H01L 29/22 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 29/51 (2006.01); H01L 29/24 (2006.01); H01L 23/528 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/441 (2006.01); H01L 21/768 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1237 (2013.01); H01L 21/02107 (2013.01); H01L 21/02323 (2013.01); H01L 21/02565 (2013.01); H01L 21/441 (2013.01); H01L 21/76897 (2013.01); H01L 23/528 (2013.01); H01L 27/1225 (2013.01); H01L 27/1259 (2013.01); H01L 29/24 (2013.01); H01L 29/42384 (2013.01); H01L 29/4908 (2013.01); H01L 29/512 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78648 (2013.01); H01L 29/78696 (2013.01);
Abstract

The present invention provides a method of forming a semiconductor device. First, a substrate having a first insulating layer formed thereon is provided. After forming an oxide semiconductor layer on the first insulating layer, two source/drain regions are formed on the oxide semiconductor layer. A bottom oxide layer is formed to entirely cover the source/drain regions, following by forming a high-k dielectric layer on the bottom oxide layer. Next, a thermal process is performed on the high-k dielectric layer, and a plasma treatment is performed on the high-k dielectric layer in the presence of a gas containing an oxygen element.

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