The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2019
Filed:
Jul. 04, 2016
Applicant:
Danfoss Silicon Power Gmbh, Flensburg, DE;
Inventors:
Assignee:
DANFOSS SILICON POWER GMBH, Flensburg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/14 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3185 (2013.01); H01L 23/3121 (2013.01); H01L 23/49544 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/73 (2013.01); H01L 23/142 (2013.01); H01L 24/48 (2013.01); H01L 24/72 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/29339 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01);
Abstract
The present invention discloses a power semiconductor module, comprising: a substrate; a semiconductor provided on a top side of the substrate; and a package formed on the semiconductor and the substrate, wherein the package has openings at a top side thereof, through which terminal contacts of the semiconductor and the substrate are exposed outside and accessible from outside.