The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2019
Filed:
Nov. 10, 2017
Synopsys, Inc., Mountain View, CA (US);
Friedrich Gunter Kurt Sendig, San Jose, CA (US);
Donald John Oriordan, Sunnyvale, CA (US);
Jonathan Lee Sanders, Santa Clara, CA (US);
Salem Lee Ganzhorn, Apex, NC (US);
Barry Andrew Giffel, Wake Forest, NC (US);
Hsiang-Wen Jimmy Lin, Menlo Park, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
Embodiments relate to designing of integrated circuits using generation and instantiation of circuit stencils. The circuit stencil represents an abstracted version of the circuit segment. The circuit stencils include collapsed versions of the connectivity information of components and nodes of the integrated circuit. The collapsed version of the connectivity information is generated by analyzing functionality of the circuit segment and removing or replacing at least one redundant component or node of the circuit segment without modifying the functionality. The circuit stencil is used for instantiating or referencing components into a second integrated circuit.