The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2019
Filed:
May. 08, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Steven R. King, Portland, OR (US);
Frank L. Berry, North Plains, OR (US);
Michael E. Kounavis, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/09 (2006.01); G06F 11/10 (2006.01); G06F 9/30 (2018.01); G06F 15/76 (2006.01); H03M 13/00 (2006.01); G06T 1/20 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1004 (2013.01); G06F 9/30003 (2013.01); G06F 9/30018 (2013.01); G06F 9/30032 (2013.01); G06F 15/76 (2013.01); G06T 1/20 (2013.01); H03M 13/00 (2013.01); H03M 13/09 (2013.01); H03M 13/093 (2013.01); H03M 13/096 (2013.01); H03M 13/157 (2013.01);
Abstract
In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.