The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2019

Filed:

Aug. 23, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Richard J. Eickemeyer, Rochester, MN (US);

Sheldon B. Levenstein, Austin, TX (US);

David S. Levitan, Austin, TX (US);

Mauricio J. Serrano, Bronx, NY (US);

Brian W. Thompto, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 9/30 (2018.01); G06F 12/0862 (2016.01); G06F 12/0875 (2016.01); G06F 12/0897 (2016.01); H04L 12/743 (2013.01);
U.S. Cl.
CPC ...
G06F 9/30047 (2013.01); G06F 12/0862 (2013.01); G06F 12/0875 (2013.01); G06F 12/0897 (2013.01); H04L 45/7457 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/452 (2013.01); G06F 2212/602 (2013.01); G06F 2212/6028 (2013.01);
Abstract

A technique for operating a processor includes allocating an entry in a prefetch filter queue (PFQ) for a cache line address (CLA) in response to the CLA missing in an instruction cache. In response to the CLA subsequently hitting in the instruction cache, an associated prefetch value for the entry in the PFQ is updated. In response to the entry being aged-out of the PFQ, an entry in a backing array for the CLA and the associated prefetch value is allocated. In response to subsequently determining that prefetching is required for the CLA, the backing array is accessed to determine the associated prefetch value for the CLA. A cache line at the CLA and a number of sequential cache lines specified by the associated prefetch value in the backing array are then prefetched into the instruction cache.


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