The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Dec. 23, 2015
Applicant:

Hitachi Power Semiconductor Device, Ltd., Hitachi-shi, Ibaraki, JP;

Inventors:

Keisuke Horiuchi, Tokyo, JP;

Daisuke Kawase, Hitachi, JP;

Masamitsu Inaba, Hitachi, JP;

Katsuaki Saito, Hitachi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/5387 (2007.01); H02H 7/122 (2006.01); H01L 29/739 (2006.01); H01L 23/498 (2006.01); H01L 23/053 (2006.01); H01L 25/07 (2006.01); H01L 23/64 (2006.01); H01L 25/18 (2006.01); H02M 7/00 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02H 7/122 (2013.01); H01L 23/053 (2013.01); H01L 23/49844 (2013.01); H01L 23/645 (2013.01); H01L 25/072 (2013.01); H01L 29/7393 (2013.01); H01L 25/18 (2013.01); H01L 2924/0002 (2013.01); H02M 7/003 (2013.01); H02M 7/5387 (2013.01); H02M 2001/0038 (2013.01);
Abstract

A semiconductor power module with which it is possible to suppress the influence of noise given from a main terminal to a control terminal is provided. At least any one of main terminals (positive electrode terminal, negative electrode terminal, alternating current terminal) is so configured that the main terminal includes two parts extended in a common direction. The two parts are, for example, formed of a single component having such as a shape that the component is bifurcated from the outside toward the inside of the semiconductor power module or two different components. The two parts are so structured that the parts are extended in a common direction. Control terminals (gate signal terminal and emitter signal terminal) are so arranged that a laminated portion of the control terminals is sandwiched between one and the other of the two parts to configure the semiconductor power module.


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