The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Dec. 26, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Kilho Lee, Busan, KR;

Gwanhyeob Koh, Seoul, KR;

Junhee Lim, Seoul, KR;

Hongsoo Kim, Seongnam-si, KR;

Chang-hoon Jeon, Goyang-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); G11C 16/04 (2006.01); G11C 11/16 (2006.01); H01L 25/18 (2006.01); H01L 27/22 (2006.01); H01L 27/11573 (2017.01); H01L 43/10 (2006.01); H01L 27/1157 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
G11C 5/06 (2013.01); G11C 11/161 (2013.01); G11C 16/0483 (2013.01); H01L 25/18 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01); H01L 27/222 (2013.01); H01L 43/10 (2013.01); H01L 27/11582 (2013.01);
Abstract

A first memory section is disposed on a substrate. A second memory section is vertically stacked on the first memory section. The first memory section is provided between the substrate and the second memory section. The first memory section includes a flash memory cell structure, and the second memory section includes a variable resistance memory cell structure. The flash memory cell structure includes at least one cell string comprising a plurality of first memory cells connected in series to each other and a bit line on the substrate connected to the at least one cell string. The bit line is interposed vertically between the at least one cell string and the second memory section and connected to the second memory section.


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