The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Dec. 02, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Krishnakanth V. Sistla, Beaverton, OR (US);

Jeremy Shrall, Portland, OR (US);

Stephen H. Gunther, Beaverton, OR (US);

Efraim Rotem, Haifa, IL;

Alon Naveh, Ramat Hasharon, IL;

Eliezer Weissmann, Haifa, IL;

Anil Aggarwal, Portland, OR (US);

Martin T. Rowland, Beaverton, OR (US);

Ankush Varma, Hillsboro, OR (US);

Ian M. Steiner, Hillsboro, OR (US);

Matthew Bace, North Andover, MA (US);

Avinash N. Ananthakrishnan, Hillsboro, OR (US);

Jason Brandt, Austin, TX (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/3234 (2019.01); G06F 1/3203 (2019.01); G06F 1/3206 (2019.01); G06F 1/32 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3275 (2013.01); G06F 1/266 (2013.01); G06F 1/3203 (2013.01); G06F 1/3206 (2013.01); G06F 1/3234 (2013.01);
Abstract

In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.


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