The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Apr. 30, 2018
Applicant:

Gpower Semiconductor, Inc., Suzhou, CN;

Inventor:

Hongwei Chen, Suzhou, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/872 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 29/872 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/402 (2013.01); H01L 29/404 (2013.01); H01L 29/407 (2013.01); H01L 29/417 (2013.01); H01L 29/66212 (2013.01); H01L 29/66219 (2013.01); H01L 29/778 (2013.01);
Abstract

A Schottky diode comprises: a substrate; a first semiconductor layer located on the substrate; a second semiconductor layer located on the first semiconductor layer, two-dimensional electron gas being formed at an interface between the first semiconductor layer and the second semiconductor layer; a cathode located on the second semiconductor layer and forming an ohmic contact with the second semiconductor layer; a first passivation dielectric layer located on the second semiconductor layer; a field plate groove formed in the first passivation dielectric layer; and an anode covering the field plate groove and a portion of the first passivation dielectric layer, wherein a distance between a bottom surface of the field plate groove and the two-dimensional electron gas in a height direction is greater than 5 nm.


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