The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Feb. 15, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Zhenxing Bi, Niskayuna, NY (US);

Donald F. Canaperi, Bridgewater, CT (US);

Thamarai S. Devarajan, Albany, NY (US);

Sivananda K. Kanakasabapathy, Niskayuna, NY (US);

Fee Li Lie, Albany, NY (US);

Peng Xu, Guilderland, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 21/762 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823481 (2013.01); H01L 21/0206 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/31138 (2013.01); H01L 21/76224 (2013.01); H01L 21/76229 (2013.01); H01L 21/823431 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01);
Abstract

A semiconductor device having a uniform height across different fin densities includes a semiconductor substrate having fins etched therein and including dense fin regions and isolation regions without fins. One or more dielectric layers are formed at a base of the fins and the isolation regions and have a uniform height across the fins and the isolation regions. The uniform height includes a less than 2 nanometer difference across the one or more dielectric layers.


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