The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2019
Filed:
Aug. 28, 2017
United Microelectronics Corp., Hsin-Chu, TW;
I-Fan Chang, Hsinchu, TW;
Yen-Liang Wu, Taipei, TW;
Wen-Tsung Chang, Tainan, TW;
Jui-Ming Yang, Taichung, TW;
Jie-Ning Yang, Pingtung County, TW;
Chi-Ju Lee, Tainan, TW;
Chun-Ting Chiang, Kaohsiung, TW;
Bo-Yu Su, Tainan, TW;
Chih-Wei Lin, Kaohsiung, TW;
Dien-Yang Lu, Kaohsiung, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to form a second spacer.