The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2019
Filed:
Sep. 15, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Jeff Willey, Timnath, CO (US);
Robert G. Blankenship, Tacoma, WA (US);
Jeffrey C. Swanson, Sunnyvale, CA (US);
Robert J. Safranek, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 13/42 (2006.01); H03M 13/09 (2006.01); H03M 13/00 (2006.01); H04L 12/46 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1004 (2013.01); G06F 13/4221 (2013.01); G06F 13/4282 (2013.01); H03M 13/09 (2013.01); H04L 12/4641 (2013.01); G06F 2213/0026 (2013.01);
Abstract
Transaction data is identified and a flit is generated to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots. In another aspect, the flit is to include two or more slots, a payload, and a cyclic redundancy check (CRC) field to be encoded with a 16-bit CRC value generated based on the payload. The flit is sent over a serial data link to a device for processing, based at least in part on the three or more slots.