The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2019
Filed:
May. 16, 2018
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Abbas Ali, Plano, TX (US);
Dhishan Kande, Dallas, TX (US);
Qi-Zhong Hong, Richardson, TX (US);
Young-Joon Park, Plano, TX (US);
Kyle McPherson, Lucas, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32136 (2013.01); H01L 21/76819 (2013.01); H01L 21/76837 (2013.01); H01L 21/76841 (2013.01);
Abstract
A method of fabricating an integrated circuit (IC) includes depositing an aluminum-containing metal interconnect layer at a first temperature over a semiconductor device having a plurality of transistors. The metal interconnect layer is annealed at a maximum annealing temperature that is less than the first temperature. The metal interconnect layer is patterned after the annealing, thereby interconnecting the transistors.