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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10359970 B1

PDFFull Text
Date of Patent:
Jul. 23, 2019

Filed:

Nov. 27, 2018

Non-volatile memory module architecture to support memory error correction

Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

George Pax, Boise, ID (US);

Jonathan Parry, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:

Schwegman Lundberg & Woessner, P.A.

Primary Examiner:

Esaw T Abraham

Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G11C 5/14 (2006.01); G11C 7/10 (2006.01); G11C 8/00 (2006.01); G11C 29/52 (2006.01); G06F 12/02 (2006.01); G11C 5/04 (2006.01); G11C 7/22 (2006.01); G11C 16/32 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0656 (2013.01); G06F 3/061 (2013.01); G06F 3/0619 (2013.01); G06F 3/0685 (2013.01); G06F 3/0688 (2013.01); G06F 11/1068 (2013.01); G06F 11/1072 (2013.01); G06F 12/0246 (2013.01); G11C 5/04 (2013.01); G11C 5/141 (2013.01); G11C 7/10 (2013.01); G11C 7/22 (2013.01); G11C 8/00 (2013.01); G11C 16/32 (2013.01); G11C 29/52 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/7202 (2013.01); G11C 2029/0411 (2013.01); G11C 2207/2245 (2013.01);
Abstract

Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.

Find Patent Forward Citations

Pax, George. (2019). Non-volatile memory module architecture to support memory error correction (U.S. Patent No. 10359970). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10359970

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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