The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Mar. 28, 2018
Applicant:

Lapis Semiconductor Co., Ltd., Yokohama, JP;

Inventor:

Takashi Nakamura, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/217 (2006.01); H03K 17/687 (2006.01); H03K 17/693 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 7/2173 (2013.01); H02M 7/217 (2013.01); H03K 17/687 (2013.01); H03K 17/693 (2013.01); H02M 2001/0048 (2013.01); H03K 2217/0018 (2013.01);
Abstract

A rectifier circuit is configured to receive first and second alternate current (AC) signals that have opposite phases. The rectifier circuit includes a first half-wave rectifier circuit that includes a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor connected in series, and performs half-wave rectification on the first AC signal to generate a first direct current (DC) signal, a second half-wave rectifier circuit that includes a third MOS transistor and a fourth MOS transistor connected in series, and performs the half-wave rectification on the second AC signal to generate a second DC signal, the first DC signal and the second DC signal being outputted by the rectifier circuit to a load, and a body potential setting circuit configured to set a body potential of each of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor.


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