The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

May. 15, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Charles H. Dennison, Meridian, ID (US);

Akira Goda, Boise, ID (US);

John Hopkins, Meridian, ID (US);

Fatma Arzum Simsek-Ege, Boise, ID (US);

Krishna K. Parat, Palo Alto, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 29/66 (2006.01); H01L 27/11578 (2017.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 21/28273 (2013.01); H01L 27/11578 (2013.01); H01L 29/66666 (2013.01); H01L 29/66825 (2013.01); H01L 29/66833 (2013.01);
Abstract

Floating gate memory cells in vertical memory. A control gate is formed between a first tier of dielectric material and a second tier of dielectric material. A floating gate is formed between the first tier of dielectric material and the second tier of dielectric material, wherein the floating gate includes a protrusion extending towards the control gate. A charge blocking structure is formed between the floating gate and the control gate, wherein at least a portion of the charge blocking structure wraps around the protrusion.


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