The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2019
Filed:
Jun. 30, 2016
Cadence Design Systems, Inc., San Jose, CA (US);
Arnold Ginetti, Antibes, FR;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Disclosed are methods, systems, and articles of manufacture for manipulating a hierarchical structure of the electronic design. These techniques identify a set of layout components instantiated from a layout of an electronic design. This set of layout components may constitute, for example, a FigGroup. One or more schematic instances and corresponding schematic connectivity information may be identified from a schematic design of the electronic design, and the one or more schematic instances correspond to the set of layout components. A layout cell or a figure group may be generated for the set of layout components based in part or in whole upon the schematic connectivity information. The original layout may then be transformed into a transformed layout at least by replacing the set of layout components with the generated layout cell or figure group.