The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Mar. 04, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Shunsuke Kodera, Yokohama Kanagawa, JP;

Yoshio Furuyama, Yokosuka Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 13/42 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G06F 3/0617 (2013.01); G06F 3/0619 (2013.01); G06F 11/1048 (2013.01); G06F 3/065 (2013.01); G06F 3/0688 (2013.01);
Abstract

A memory system includes a semiconductor memory device including a plurality of memory blocks, including a first block storing data and a second block storing backup data, a plurality of pins, and a controller configured to output a control signal to the semiconductor memory in accordance with the command. When the controller receives from outside of the memory system, a read command for the data in the first block, and the data in the first block are available, the controller is configured to transmit the data in the first block to the outside of the memory system. When the controller receives from outside of the memory system, a read command for the data in the first block, and the data in the first block are not available, the controller is configured to transmit the backup data in the second block to the outside of the memory system.


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