The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Nov. 15, 2017
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventor:

Xin He, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/306 (2006.01); H01L 21/28 (2006.01); H01L 21/3105 (2006.01); H01L 25/00 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 21/311 (2006.01); H01L 29/51 (2006.01); H01L 21/8234 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30604 (2013.01); H01L 21/28185 (2013.01); H01L 21/28194 (2013.01); H01L 21/31055 (2013.01); H01L 21/823842 (2013.01); H01L 25/50 (2013.01); H01L 29/42356 (2013.01); H01L 29/42364 (2013.01); H01L 29/42368 (2013.01); H01L 29/4983 (2013.01); H01L 29/78 (2013.01); H01L 21/31144 (2013.01); H01L 21/82345 (2013.01); H01L 27/092 (2013.01); H01L 29/518 (2013.01);
Abstract

Semiconductor structures and fabrication methods are provided. The semiconductor structure includes a base including first, second, third, and fourth regions, used for first, second, third, and fourth transistors, respectively. A gate dielectric layer is on the first, second, third and fourth regions of the base. A first material layer is on the gate dielectric layer. A second material layer is on the first material layer above the fourth region. A third material layer is on the first material layer above the third region and on the second material layer above the fourth region. A fourth material layer is on the third material layer above the third and fourth regions and on the first material layer on the second region. The first material layer above the first region is used as a first work function layer for the first transistor.


Find Patent Forward Citations

He, Xin. (2019). Semiconductor structure and fabrication method thereof (U.S. Patent No. 10347496). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10347496

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…