The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Jul. 02, 2013
Applicant:

General Electric Company, Schenectady, NY (US);

Inventors:

Peter Almern Losee, Clifton Park, NY (US);

Alexander Viktorovich Bolotnikov, Niskayuna, NY (US);

Stacey Joy Kennerly, Colonie, NY (US);

Assignee:

GENERAL ELECTRIC COMPANY, Schenectady, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/04 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/74 (2006.01);
U.S. Cl.
CPC ...
H01L 21/046 (2013.01); H01L 29/0615 (2013.01); H01L 29/0619 (2013.01); H01L 29/1608 (2013.01); H01L 29/66068 (2013.01); H01L 29/7395 (2013.01); H01L 29/7811 (2013.01); H01L 29/74 (2013.01);
Abstract

A method of manufacturing a semiconductor device is presented. The method includes providing a semiconductor layer comprising silicon carbide, wherein the semiconductor layer comprises a first region doped with a first dopant type. The method further includes implanting the semiconductor layer with a second dopant type using a single implantation mask and a substantially similar implantation dose to form a second region and a junction termination extension (JTE) in the semiconductor layer, wherein the implantation dose is in a range from about 2×10cmto about 12×10cm. Semiconductor devices are also presented.


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