The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Oct. 02, 2017
Applicant:
Globalfoundries Singapore Pte. Ltd., Singapore, SG;
Inventors:
Yohann Frederic Michel Solaro, Singapore, SG;
Chai Ean Gill, Singapore, SG;
Tsung-Che Tsai, Singapore, SG;
Assignee:
GLOBALFOUNDRIES SINGAPORE PTE. LTD., Singapore, SG;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H01L 29/0619 (2013.01); H01L 29/1095 (2013.01); H01L 29/7816 (2013.01);
Abstract
Methods of forming a high voltage ESD GGNMOS using embedded gradual PN junction in the source region and the resulting devices are provided. Embodiments include a device having a substrate including a device region with an ESD protection circuit; a gate over the device region; a source region in the device region having a N+ implant and a P+ implant laterally separated on a first side of the gate; and a drain region in the device region on a second side of the gate, opposite the first.