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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10339094 B1

PDFFull Text
Date of Patent:
Jul. 02, 2019

Filed:

May. 19, 2015

Vector processor configured to operate on variable length vectors with asymmetric multi-threading

Applicant:

Optimum Semiconductor Technologies, Inc., Tarrytown, NY (US);

Inventors:

Mayan Moudgill, Chappaqua, NY (US);

Gary J. Nacer, Morris Plains, NJ (US);

C. John Glossner, Nashua, NH (US);

Arthur Joseph Hoane, Yonkers, NY (US);

Paul Hurtley, White Plains, NY (US);

Murugappan Senthilvelan, Carmel, NY (US);

Pablo Balzola, Madrid, ES;

Vitaly Kalashnikov, Norwalk, CT (US);

Sitij Agrawal, Irvington, NJ (US);

Assignee:

OPTIMUM SEMICONDUCTOR TECHNOLOGIES, INC., Tarrytown, NY (US);

Attorney:

Zhong Law, LLC

Primary Examiner:

Daniel H Pan

Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/46 (2006.01); G06F 15/76 (2006.01); G06F 15/80 (2006.01); G06F 9/30 (2018.01); G06F 17/14 (2006.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 15/8053 (2013.01); G06F 9/3001 (2013.01); G06F 9/30021 (2013.01); G06F 9/30036 (2013.01); G06F 9/30101 (2013.01); G06F 9/30109 (2013.01); G06F 9/30112 (2013.01); G06F 9/30141 (2013.01); G06F 9/3836 (2013.01); G06F 9/3855 (2013.01); G06F 15/7828 (2013.01); G06F 15/7839 (2013.01); G06F 15/8076 (2013.01); G06F 17/142 (2013.01); G06F 9/461 (2013.01); G06F 9/462 (2013.01);
Abstract

A computer processor is disclosed. The computer processor comprises one or more processor resources. The computer processor further comprises a plurality of hardware thread units coupled to the one or more processor resources. The computer processor may be configured to permit simultaneous access to the one or more processor resources by only a subset of hardware thread units of the plurality of hardware thread units. The number of hardware threads in the subset may be less than the total number of hardware threads of the plurality of hardware thread units.

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