The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Mar. 13, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventors:

Yoshiaki Osada, Kawasaki Kanagawa, JP;

Katsuhiko Hoya, Yokohama Kanagawa, JP;

Yorinobu Fujino, Hachioji Tokyo, JP;

Kosuke Hatsuda, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/08 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G11C 11/16 (2006.01); G11C 29/52 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 11/1048 (2013.01); G06F 11/1068 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 29/52 (2013.01); G11C 29/781 (2013.01);
Abstract

According to one embodiment, a memory device includes a memory cell; a first circuit that performs a first read on the memory cell, writes first data in the memory cell on which the first read has been performed, performs a second read on the memory cell in which the first data has been written, determines data from a result of the first read based on a result of the second read, and writes back the determined data into the memory cell; and an error correcting circuit that performs error correction on the determined data.


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