The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Oct. 18, 2015
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Inventors:

Changfeng Li, Beijing, CN;

Xue Dong, Beijing, CN;

Haisheng Wang, Beijing, CN;

Xiaochuan Chen, Beijing, CN;

Lei Wang, Beijing, CN;

Yingming Liu, Beijing, CN;

Shengji Yang, Beijing, CN;

Xiaoliang Ding, Beijing, CN;

Weijie Zhao, Beijing, CN;

Wei Liu, Beijing, CN;

Hongjuan Liu, Beijing, CN;

Jiantao Liu, Beijing, CN;

Rui Xu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/041 (2006.01); G06F 3/044 (2006.01); G02F 1/1333 (2006.01); G02F 1/1362 (2006.01); G02F 1/136 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0412 (2013.01); G02F 1/13338 (2013.01); G06F 3/044 (2013.01); G02F 1/136286 (2013.01); G02F 2001/13606 (2013.01); G02F 2001/136231 (2013.01); G02F 2201/40 (2013.01); G06F 2203/04103 (2013.01); G06F 2203/04111 (2013.01);
Abstract

An in-cell touch panel and a display device are disclosed, in the in-cell touch panel, each of the self-capacitance electrodes includes a plurality of self-capacitance sub-electrodes which are insulated from each other and connecting lines for connecting the self-capacitance sub-electrodes; an orthographic projection on the first substrate of each self-capacitance sub-electrode does not overlap with an orthographic projection on the first substrate of each gate line; and/or an orthographic projection on the first substrate of each self-capacitance sub-electrode does not overlap with an orthographic projection on the first substrate of each data line. Thus, there is almost no overlapping area between the self-capacitance electrodes and the gate lines and/or there is almost no overlapping area between the self-capacitance electrodes and the data lines, thus there is almost no overlapping capacitance.


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