The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Nov. 30, 2016
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Ling Wang, Suzhou, CN;

Wanggen Zhang, Suzhou, CN;

Wei Zhang, Suzhou, CN;

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/317 (2006.01); G01R 31/3185 (2006.01); G01R 31/34 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31723 (2013.01); G01R 31/31725 (2013.01); G01R 31/318541 (2013.01); G01R 31/318575 (2013.01);
Abstract

An integrated circuit operable in a scan mode includes a scan chain formed by cascaded flip-flop cells. Each flip-flop cell includes a master latch that receives a first data signal and generates a first latch signal, a slave latch that receives the first latch signal and generates a second latch signal, and a multiplexer having first and second inputs respectively connected to the master and slave latches that receives a first input signal and the second latch signal, and generates a scan data output signal depending on an input trigger signal. The first input signal is one of the first data signal and the first latch signal. The clock signal provided to the slave latch is gated by the input trigger signal.


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