The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

Aug. 29, 2017
Applicant:

United Microelectronics Corporation, Hsin-Chu, TW;

Inventors:

Chia-Lin Lu, Taoyuan, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Chun-Lung Chen, Tainan, TW;

Kun-Yuan Liao, Hsinchu, TW;

Feng-Yi Chang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 23/485 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6656 (2013.01); H01L 21/76897 (2013.01); H01L 23/485 (2013.01); H01L 29/665 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01); H01L 21/76834 (2013.01); H01L 29/66628 (2013.01);
Abstract

A semiconductor device with reinforced gate spacers and a method of fabricating the same. The semiconductor device includes low-k dielectric gate spacers adjacent to a gate structure. A high-k dielectric material is disposed over an upper surface of the low-k dielectric gate spacers to prevent unnecessary contact between the gate structure and a self-aligned contact structure. The high-k dielectric material may be disposed, if desired, over an upper surface of the gate structure to provide additional isolation of the gate structure from the self-aligned contact structure.


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