The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2019
Filed:
May. 09, 2017
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Tzu-Ping Chen, Hsinchu County, TW;
Chien-Hung Chen, Hsin-Chu, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 27/06 (2006.01); H01L 21/285 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 27/11541 (2017.01); H01L 27/11543 (2017.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 21/28273 (2013.01); H01L 21/28518 (2013.01); H01L 21/31144 (2013.01); H01L 27/11541 (2013.01); H01L 27/11543 (2013.01); H01L 29/42324 (2013.01); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01);
Abstract
A semiconductor device includes a semiconductor substrate, a tunnel dielectric disposed on the semiconductor substrate, a floating gate disposed on the tunnel dielectric, a control gate disposed on the floating gate, and an insulation layer disposed between the floating gate and the control gate. The semiconductor device further includes a spacer continuously distributed on the sidewall surfaces of the floating gate and the control gate, and the spacer overlaps portions of the top surface of the floating gate.